This invention relates to arrays of memory cells. Modern manufacturing techniques make it possible to pack more memory cells on a given area of substrate. Newer types of memory, such as Phase Change Memory cells, need a large amount of current to operate. This in turn has given rise to transistors, such as vertical access transistors, that allow for a large amount of current to be delivered to a relatively small area.
The confluence of high current densities and memory cells packed into relatively small areas has resulted in configurations and methods of manufacture that can accommodate them. One development has been the use of a self-alignment fabrication technique that allows structure to be formed on the substrate without photo resist masking. This allows for a tighter packing of cells than otherwise possible using traditional lithography techniques. However, such tightly packed memory arrays are susceptible to unintentional electrical shorting between the common-source contact and the word-line contact, thus rendering the memory array nonfunctional.